GPIOs geographical layout

There are several connectors available. On the Pine64 POT Development board, each of the ports for PI-2-Bus, Euler, and Expansion have been given a mnemonic labeling letter (P, E, and X), and although they are identified as J47 etc in the schematics, I will include these letters in the listings and discussions below as needed. I extended this scheme to the Wifi, Bluetooth, and TP ports also.

Pin numbers legend.

PPI-2-BUS (40)
EEuler Bus (34)
XExpansion Connector(10)
WWifi (14)
BBluetooth (16)
TTP connector (6)

The (E) marking on some of the GPIO lines means that this gpio-line has support for interrupts. Sysfs will provide an edge file for them.

P (J47) PI-2-BUS Connector

P1 3.3V P2 5.0V
P3 PH3 G227 (E) TWI1_SDA P4 5.0V
P5 PH2 G226 (E) TWI1_SCL P6 Gnd
P7 PL10 G362 (E) S_PWM P8 PB0 G32 (E) UART2_TX
P9 Gnd P10 PB1 G33 (E) UART2_RX
P11 PC7 G71 P12 PC8 G72 1w
P13 PH9 G233 (E) P14 Gnd
P15 PC12 G76 P16 PC13 G77
P17 3.3V P18 PC14 G78
P19 PC0 G64 SPI0_MOSI P20 Gnd
P21 PC1 G65 SPI0_MISO P22 PC15 G79
P23 PC2 G66 SPI0_CLK P24 PC3 G67 SPI0_CS
P25 Gnd P26 PH7 G231 (E) SPK Note 1
P27 PL9 G361 (E) S_TWI_SDA P28 PL8 G360 (E) S_TWI_SCK
P29 PH5 G229 (E) UART3_RX P30 GND
P31 PH6 G230 (E) UART3_RTS P32 PC4 G68
P33 PC5 G69 P34 GND
P35 PC9 G73 P36 PC6 G70
P37 PC16 G80 P38 PC10 G74
P39 Gnd P40 PC11 G75

There are spaces on the board for pull-up resistors on TWI1_SDA R9705 and TWI1_SCL R9706 (page 17) but none have been fitted. Schematics indicate these should be 2 kΩ. These resistors are tiny surface-mount ones, R0402 form factor.

E (J48) Euler "e" Connector

E1 3.3V E2 DC IN
E3 Lithium Batt+ E4 DC IN
E5 Temp Sensor E6 Gnd
E7 PL11 G363 (E) IR_RX E8 5 V
E9 Gnd E10 PH8 G232 (E) SPDIF OWA_OUT
E11 PB3 G35 (E) UART2_CTS I2S_MCK E12 PB4 G36 (E) I2S_SYNC
E13 PB5 G37 (E) I2S_BCK E14 Gnd
E15 PB6 G38 (E) I2S_DOUT E16 PB7 G39 (E) I2S_DIN
E17 3.3V E18 PD4 G100 UART4_RTS
E19 PD2 G98 UART4_TX SPI1_MOSIE20 Gnd
E21 PD3 G99 UART4_RX SPI1_MISOE22 PD5 G101 UART4_CTS
E23 PD1 G97 UART3_RX SPI1_SCK E24 PD0 G96 UART3_TX SPI1_CS
E25 Gnd E26 PD6 G102
E27 PB2 G34 (E) UART2_RTS E28 PD7 G103
E29 PB8 G40 (E) UART0_TX E30 PB9 G41 (E) UART0_RX
E31 EAROUTP E32 EAROUTN
E33 NC E34 GND

The unit can be powered via the micro-usb connector, or with 5V applied to pins E2 and E4, 0V on any or all of the pins E6, E9, E14, E20, E25, E34.

X (J51) Exp Connector, 3.3 V Vio

X1 3.3V X2 PL7 G359 (E) System LED -K
X3 Charger LED -K X4 Reset Sw
X5 Pwr Stb Sw X6 Gnd
X7 PB8 G40 (E) UART0_TX X8 PB9 G41 (E) UART0_RX (G)
X9 Gnd X10 KeyADC

Pins X2 and X3 are also connected to the Cathode, or negative, side of the Charger LED and System LED. The positive side of these LEDs should be returned to +3.3V via a resistor, in the usual way. The pins here do not include any such resistors, while the connection points on the edge of the board do: (schematics v2 page 12), where the one for the Charge LED is 1kΩ and the one for the System LED, PL7, is 510Ω. Similarly sized resistors will be needed in series with LEDs connected here at pins X2 and X3.

Pins X4 and X5 are switch inputs, the other side of these switches should go to 0V. The necessary 1kΩ pull-up resistors are already in place.

Pins X8 connects to the UART0 RX line (PB9) via a MOSFET, so when power is off, any High voltage impressed on the RX line (X8) doesn't try to backfeed power into the Pine. This is in contrast to the connection to the UART0 on pin E30 where no such protection exists. Thus, when connecting to another device for looking at the bootup messages on the serial port, these pins, X7 and X8, are the ones that should be used.

W (J49) Wifi+BT Port (14-pin) 2mm pitch, 1.8 V Vio

W1 GND W2 PG2 G194 (E)SDC1-D0 SDIO-D0
W3 PG0 G192 (E) SDC1-CK SDIO-CLK W4 PG3 G195 (E) SDC1-D1 SDIO-D1
W5 GND W6 PG4 G196 (E) SDC1-D2 SDIO-D2
W7 PG1 G193 (E) SDC1-CMD SDIO-CMD W8 PG5 G197 (E) SDC1-D3 SDIO-D3
W9 PL2 G354 (E) S-UART-TX WL-REG-ON W10 X32KFOUT AP-CK32KO
W11 PL3 G355 (E) S-UART-RX WL-WAKE-AP W12 GND
W13 VCC-WIFI (3.3V) W14 VCC-WIFI (3.3V)

B (J50) Wifi+BT Port (16-pin) 2mm pitch, 1.8 V Vio

B1 PG10 G202 (E) AIF3-SYNC PCB1-SYNC BT-PCM-SYNC B2 PG6 G198 (E) UART1-TX BT-UART-RX
B3 PG11 G203 (E) AIF3-CLK PCB1-BCLK BT-PCM-BCLK B4 PG7 G199 (E) UART1-RX BT-UART-TX
B5 PG12 G204 (E) AIF3-DOUT PCB1-DOUT BT-PCM-DIN B6 PG8 G200 (E) UART1-RTS BT-UART-CTS
B7 PG13 G205 (E) AIF3-DIN PCB1-DIN BT-PCM-DOUT B8 PG9 G201 (E) UART1-CTS BT-UART-RTS
B9 GND B10 GND
B11 PL5 G357 (E) S-JTAG-CK BT-WAKE-AP B12 PL4 G356 (E) S-JTAG-MS BT-RST-N
B13 PL6 G358 (E) S-JTAG-DO AP-WAKE-BT B14 VCC-WIFI-IO (1.8V)
B15 GND B16 GND

T (J21) TP 3.3 V Vio

This is the connector for the touch-sensor on the LCD. When the LCD is not being used, there is a functional i2c bus (/dev/i2c-0) and two more GPIO lines available here. The standard connection is via a narrow flat cable, but there are pads on the underside of the board that provide points to which wires can be soldered. Schematics indicate that this i2c-bus has the necessary pull-up resistors fitted, but this needs to be verified.

T1 PH11 G235 (E) CTP_RST TP23
T2 PH4 G228 (E) CTP_INT UART3_TX TP24
T3 PH0 G224 (E) TWI0_SCL TP25
T4 PH1 G225 (E) TWI0_SDA TP26
T5 VCC-CTP (3.3V)TP28
T6 Gnd TP27

Under the TP connector on the top of the card, there are 6 test-points in a 3 by 2 staggered formation, which are TP23 thru TP28, counting from the nearest corner of the card (near the HDMI). The first four of these are T1 thru T4 in that order, the next one is T6 GND and the last one is T5 VCC-CTP, which appears to be open, since the channel named GPIO0LDO from the power distribution chip has this turned off. We can backfeed +3.3V in here to bias the SDA and SCL or use a kernel-module that contain the necessary calls to turn the power on.

There is a bunch of sysfs references to this and the other channels in /sys/devices/platform, notably /sys/devices/platform/reg-81x-cs-gpio0ld0/

  G  T3  T1
T5  T4  T2

Power-control is using an internal TWI bus, via PL1/PL0 which are configured to mode 2, S_RSB_SDA/S_RSB_SCL. Maybe the upower daemon can talk with this?

In sysfs there is also the file which identifies as name being the gpio0ldo, and it has state disabled, indicating it is turned off. Other regulator-files are present for the other channels out of the power chip.

/sys/devices/platform/axp81x_board/axp-regulator.30/regulator/regulator.21/name
/sys/devices/platform/axp81x_board/axp-regulator.30/regulator/regulator.21/state

See the pages on on i2c and on kernel hacking for notes on how to turn the power on this regulator on and off.

Other ports

The Camera, CSI, and Display, DSI ports might possibly also be re-purposed, where at least some GPIOs may be available. Schematics indicates that CSI is hooked up to ports in the PE range, and the DSI has ports in the PD range. These are all 2.5 V Vio and none of them support interrupts, so this seems to put them rather far down in priority for further re-use, considering the tedium of connecting the 40 or so tiny wires.

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